Mentor Graphics FPGA I/O Optimization PCB设计

FPGA I/O Optimization

The power, flexibility and immediate availability of FPGA devices create compelling business drivers has generated a tsunami of FPGA adoption for the implementation of system PCB designs. Obviously, the time to market advantages and capacity/performance characteristics of FPGA devices have delivered on the promise for a viable alternative to more capital resource intensive custom IC/ASIC solutions as well as a successful consolidation vehicle for standard “off the shelf” components in system design creation.

BENEFITS:

• Bridges the domains of HDL-based FPGA design and PCB design for automated, fast and error free bidirectional data exchange
• Fully integrated, easy to use multi-FPGA on board I/O optimization reduces layer count, cost and design time
• Correct-by-construction FPGA vendor rule-driven I/O assignment minimizes re-spins
• Fast, easy and automated FPGA symbol generation saves days of PCB design creation time
• Fast and error free I/O optimization utilizing FPGA symbols from the standard corporate library

Technical Specifications：

• Supports the latest FPGA vendor devices by Altera, Xilinx, Lattice and Microsemi to minimize setup time and eliminates manual errors
• On-demand service guarantees the very latest device support, generally less than 14 days
• Bi-directional I/O optimization and pin-swapping based on actual PCB layout component orientation
• Built-in I/O assignment rules specific to each device, simplifying pin assignments
• Uses the generic FPGA symbol/symbol set from your corporate library, or allows you to create custom sets for a specific FPGA design
• Manages data consistency between flows, automatically generating updated FPGA place and route constraints
• Integrated floor planner allows optimization of FPGA I/O on engineer’s desktop for improved placement and routing
• Get better results by optimizing across multiple FPGA devices, using proven technology
• Tight integration with Xpedition Enterprise and PADS Professional flows, enabling access and optimization at any point in the design process