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Aldec  China Active-HDL 电磁与电子分析
  • Aldec  China Active-HDL 电磁与电子分析

Aldec China Active-HDL 电磁与电子分析

Aldec公司是一家业界领先的电子设计自动化(EDA)公司,在复杂的FPGA中提供创新的设计制作,仿真和验证,协助ASIC的开发解决方案,SOC与嵌入式系统设计。在社区超过35000个活跃的用户,50+全球合作伙伴,全球办事处和全球销售分

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Active-HDL
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Active-HDL is a Windows based, integrated FPGA Design Creation and Simulation solution for team-based environments. Active-HDL’s Integrated Design Environment (IDE) includes a full HDL and graphical design tool suite and RTL/gate-level mixed-language simulator for rapid deployment and verification of FPGA designs.

The design flow manager evokes 120+ EDA and FPGA tools, during design entry, simulation, synthesis and implementation flows and allows teams to remain within one common platform during the entire FPGA development process. Active-HDL supports industry leading FPGA devices from Altera, Atmel, Lattice, Microsemi (Actel), Quicklogic, Xilinx and more.

Top Features and Benefits

  1. Project Management
  • Unified Team-based Design Management maintains uniformity across local or remote teams
  • Configurable FPGA/EDA Flow Manager interfaces with 120+ vendors tools allows teams to remain on one platform throughout FPGA development
  1. Graphical/Text Design Entry
  • Quickly deploy designs by using Text, Schematic and State Machine
  • Distribute or deliver IPs using more secure and reliable Interoperable Encryption standard
  1. Simulation and Debugging
  • Powerful common kernel mixed language simulator that supports VHDL, Verilog, SystemVerilog (Design) and SystemC
  • Ensure code quality and reliability using graphically interactive debugging and code quality tools
  • Perform metrics driven verification to identify unexercised parts of your design using Code Coverage analysis tools
  • Improve verification quality and find more bugs using ABV – Assertion-Based Verification (SVA, PSL, OVA)
  • Connect the gap between HDL simulation and high level mathematical modeling environment for DSP blocks using MATLAB/Simulink interface
  1. Documentation HTML/PDF
  • Abstract design intelligence and represent them in easy to understand graphical form using HDL to schematic converter
  • Share designs quickly with auto-generate Design Documentation in HTML and PDF
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